Research Projects

All the research projects that the Space Technology Centre has been involved in are described below:

VINSE: Vision-Based Integrated Navigation for Space Exploration

The VINSE (Vision-Based Integrated Navigation for Space Exploration) activity is an EU Marie Curie Outgoing International Fellowship. The Research Fellow is Dr Victor Silva, a former PhD student in the Space Technology Centre at Dundee. Victor is funded to work for two years at the NASA Jet Propulsion Laboratory (JPL) and to then return to Dundee for another year. His research intends to show that the integration/fusion of visual information with inertial measurements can provide robust surface relative navigation suitable for planetary lander missions to many different planetary bodies. The objectives will be achieved through the international collaboration with the JPL, the World’s leading organization on technology for planetary landers and robotic space exploration, and the UoD (University of Dundee), Europe’s leading organization on planet surface and sensor simulation for testing planetary landers.

LIDAR-ILT

The LIDAR-ILT research was done as a sub-contractor to EADS Astrium SAS. The aim of this work was to extend PANGU scanning LIDAR sensor to support a different type of scanning pattern designed for a surface rover vehicle. In contrast to the original LIDAR-GNC scanner, the ILT system performs sinusoidal scans on sub-windows of the full field of view.

After each scan is completed the system moves to an adjacent sub-window and scans in the opposite direction to minimise scanner movement. Within each scanning window the horizontal motion of the laser varies sinusoidally while the vertical motion is linear. Although each scan is expected to take several seconds in real time, the sensor simulation takes into account spacecraft motion during the scanning interval. PANGU models and the LIDAR simulation have been integrated in a guidance and navigation control system prototype by Astrium.

SpaceWire CODEC IP - Actel Implementation

The SpaceWire CODEC IP Actel implementation is an ESA managed project to provide an implementation of the SpaceWire CODEC IP VHDL model to the Actel RTAX and RTSX FPGA series devices. The Actel RTAX and RTSX devices are radiation tolerant versions of the AX and SX commercial FPGAs which provide protection against single event effects (SEE). RTAX and SX devices use anti-fuse (program once) technology, are protected from single event latch-up (SEL) and implement triple mode redundancy for each internal flip-flop to protect against single event upsets (SEU).